This invention relates to semiconductor integrated circuit devices and relates, for example, to a technique which is effective when applied to static RAMs (Random Access Memories) comprising the combination of bipolar transistors and CMOS (complementary MOS) circuits.
Japanese Patent Laid-Open No. 58193/1981 proposes a static RAM comprising bipolar transistors and CMOS circuits in order to improve the operation speed of the static RAM.
The static RAM of the type described above is typically mounted to a printed circuit board for use. Therefore, the output circuit of the static RAM must be able to drive load capacitance (parasitic capacitance) of a relatively large value such as floating capacitance existing in the mounting substrate such as the printed circuit board which is connected to the output terminals, and input capacitance of signal input devices that receive the output signals of this static RAM. To drive such load capacitance at a high speed, the output circuit described above must have a relatively large current supply capacity. The output circuit drives the load capacitance by discharging or charging it up. Therefore, a relatively large current flows through a power source wiring or a ground potential wiring of the static RAM when the output circuit drives the load capacitance having a relatively large value. The power source voltage wiring V.sub.cc and the ground potential wiring V.sub.ss inside the RAM have a resistance component and an inductance component that cannot be neglected, respectively. Therefore, noise of a relatively large value develops in these wirings when a current of a relatively large value flows.
When the potential of the ground potential line of the circuit is raised temporarily by the noise described above, the logic threshold voltage of the input circuit that receives the input signals from the output terminals of the static RAM, such as an address buffer, rises by a voltage corresponding to the rise of the ground potential. This means that the high level margin of the input circuit that receives the input signal drops when viewed from the input signal supplied from the output terminal. In other words, even if the level is one that must be judged as the high level, it is judged erroneously as the low level in the input circuit due to the rise of the logic threshold voltage described above.
Particularly in the case of RAMs of the type in which access is made in the unit of a plurality of bits such as x4 or x8 bits, four or eight output circuits incorporated in the RAM operate simultaneously so that the rise of the ground potential of the circuit can never be neglected.